EDUCATION
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Ph. D. in Electrical Engineering, Purdue University, West Lafayette, IN 1970
M.S. in Electrical Engineering, Purdue University, West Lafayette, IN 1966
B.S. in Electrical Engineering, Purdue University, West Lafayette, IN 1962
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PROFESSIONAL EXPERIENCE
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Professor, Department of Electrical and Computer Engineering, University of California , Davis, 1984- present.
Research Associate, Intel Corporation, Platform Components Division, Folsom, CA, 1998-1999
Visiting Scientist, Reliability Laboratory, ETH( Swiss Federal Institute of Technolgy), Zürich, Switzerland 1993-1994
Consultant, ( Fault-Tolerant Computing),Sandia National Laboratories, Livermore, CA, 1987-1991
Associate Professor, Electrical, Computer, and Systems Engineering Department, Rensselaer Polytechnic Institute, Troy, NY, 1976-1984 [Founding member, Center for Integrated Electronics, (VLSI Center)]
Consultant, ( Fault-Tolerant Computing), UNISYS, , Plymouth, MI 1984
Visiting Scientist, IBM, Data Systems Division, Poughkeepsie, NY, 1982-1983
Visiting Scientist, Signal Processing Department, The Mitre Corporation, Bedford, MA, (Summers) 1981-1983
Fellow with Chief Scientist, Defense Communications Agency, Reston, VA, 1975-1976
Staff Engineer, Communications and Electronics Division, Lockheed-Martin , Orlando, FL, 1973-1975
Assistant Professor, Department of Electrical and Computer Engineering, University of Wisconsin, Madison, WI, 1970-1974, [Also, Member, Professional Staff, Space Science and Engineering Center, University of Wisconsin.]
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AFFILIATION
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Electrical and Computer Engineering Graduate Group
Chemical Engineering and Material Science Graduate Group
Nanomaterials in the Environment, Agriculture, and Technology (NEAT), UC Davis
The Center for Information Technology Research in the Interest of Society (CITRIS), University of California
Berkeley Sensors & Actuator Center (BSAC), University of California, Berkeley
National Institute for Nano Engineering (NINE), Sandia National Laboratories
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RESEARCH INTERESTS
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Fault-tolerant computing: Reliability enhancements in communication and signal processing designs, protecting data compression systems, algorithm-based fault tolerance, combating soft errors in earth-satellite computing resources.
Real number coding: Design of real number block codes, real number code detection and correction, wavelet codes, Kalman error-correcting methods, integer-valued coding including iterative decoding procedures.
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RESEARCH ACTIVITIES
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Professor Redinbo's research is in the general area of the design and analysis of reliable computing resources, both at the digital system and subsystem levels. His work emphasizes fault-tolerant computer implementations and is motivated by theoretical concepts as well as practical experience. He is particularly interested in communication and signal processing functions that are affected by soft errors causing momentary malfunctions. Earth-orbiting satellites containing high-speed processing resources which support fast transforms and multiplexing operations are studied. Data compression procedures which are very susceptible to processing failures benefit from reliable design features. JPEG and arithmetic coding data compression standards are of particular focus. A distinctly new approach to reliable computing uses algorithmic-level fault tolerance techniques for increasing dependability in processed data by employing real number error-detecting codes. An important challenge is separating numerical roundoff effects from internal hardware failure effects.
Professor Redinbo also studies real number error-detecting and correcting codes, their design and error correction procedures. Such codes involve symbols that have real or integer values as opposed to classic binary codes. The new, developing wavelet codes which are similar to convolutional codes hold great promise of protecting many data processing subsystems.
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DISTINCTIONS
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Professor Redinbo is a Fellow of The Institute of Electrical and Electronics Engineers (IEEE).
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SELECTED PUBLICATIONS
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Cung Nguyen and, G. Robert Redinbo, “Detecting Computer-Induced Errors in Remote-Sensing JPEG Compression Algorithms,” IEEE Transaction on Image Processing, vol.15, pp. 2092-2102, July 2006.
Cung Nguyen and, G. Robert Redinbo," Integrated Fault Tolerance in JPEG Image Compression Standard," IEEE Transactions on Computers, vol. 2, No. 1, pp. 57-75, January-March, 2005.
G. Robert Redinbo and Cung Nguyen, "Concurrent Error Detection in Wavelet Lifting Transforms," IEEE Transactions on Computers, vol.53. pp. 1291-1302, October, 2004.
G. Robert Redinbo, "Feedback Decoding of Fixed-Point Arithmetic Convolutional Codes," IEEE Transactions on Communications, vol. 52, pp.857-860, June 2004.
G. Robert Redinbo, " Failure-Detecting Arithmetic Convolutional Codes
and an Iterative Correcting Strategy," IEEE Transactions on Computers, vol.52. pp. 1434-1442, November, 2003.
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